In order to emulate this you probably will want to create some sort of bus that can intercept CPU writes/reads to ram and forward them to the PPU and to other hardware like ROM's PRGROM which is mapped to address range 0x8000-0xffff for example. Whenever the CPU writes to addresses 0x2000-0x2007 it's actually writing to the PPU's registers. Only the first 2kb are usable for the CPU to use as temporary storage, and the rest are mapped to other hardware. The CPU has its 16bit address space between 0x0000 and 0xffff. The exact timing is a little more complex but this is the basic idea. Some of these take place off screen, and for the extra scanlines it allows the CPU some time to change the graphics.
The other tricky thing is that the PPU actually draws 341 pixels each scanline for 261 scanlines (iirc) despite the screen resolution only being 256x240. The period of time between scanline 240 and 261 is called vblank. Then it does 240 scanlines and sends an NMI to the CPU so the CPU knows it can start safely writing to the PPU without corrupting the graphics (but some games write to it anyways for special effects). It draws from left to right for 256 pixels which is called a scanline.
The basic idea of the PPU is that every cycle it draws a single pixel. The CPU for example will writing to the PPUDATA register to fill the nametable up to allow the PPU to start drawing background tiles from the pattern tables. The first thing to do to implement the PPU is to get the CPU's memory connected to the PPU's registers somehow, that way the two can communicate. The PPU is not programmable, it just does the same thing over and over again indefinitely and the CPU can change a few things about how it behaves by reading/writing to the various memory mapped registers.
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